专利名称：Phase lock loop circuit发明人：Minoru Maeda申请号：US09847565申请日：20010502公开号：US06700945B2公开日：20040302
专利附图：
摘要：A phase lock loop circuit includes operation means (CPU) for previouslycalculating divider control data to obtain a division number corresponding to an outputfrequency, and a divider switching memory circuit for writing the divider control data andreading a division value every time an output of a variable divider is generated, thereby
controlling the variable divider
申请人：ANDO ELECTRIC CO., LTD.
代理机构：Fish & Richardson P.C.
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