On chip network

专利名称：On chip network

发明人：Ned D. Garinger,Martin L. Dorr,Mark W.

Naumann,Gary A. Walker

申请号：US10207298申请日：20020729

公开号：US20040017820A1公开日：20040129

专利附图：

摘要：An OCN for integrated processing elements including a network with multipleports and multiple port interfaces. The ports and the port interfaces conform to aconsistent port protocol. Each port interface converts information between bus

transactions of a corresponding processing element and network packets and exchangesnetwork packets with other port interfaces. Each port includes an arbitration interfaceand a data interface and the network includes an interconnect and an arbiter. Theinterconnect includes selectable data paths between the ports for packet datumtransfer. A port source interface submits transaction requests and provides packetdatums upon receiving an acknowledgement. A port destination interface receives packetdatums via available input buffers. Each transaction request includes a transaction sizeand a destination port address. The arbiter receives transaction requests, arbitratesamong transaction requests, provides acknowledgements and controls the interconnectto select data paths between sources and destinations.

申请人：GARINGER NED D.,DORR MARTIN L.,NAUMANN MARK W.,WALKER GARY A.

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