High Common-Mode VoltageProgrammable Gain Difference Amplifier
FEATURES
High common-mode input voltage range ±120 V at VS = ±15 V Gain range 0.1 to 100
Operating temperature range: −40°C to ±85°C Supply voltage range
Dual supply: ±2.25 V to ±18 V Single supply: 4.5 V to 36 V Excellent ac and dc performance
Offset temperature stability RTI: 10 µV/°C max Offset: ±1.5 V mV max
CMRR RTI: 75 dB min, dc to 500 Hz, G = +1
APPLICATIONS
High voltage current shunt sensing Programmable logic controllers
Analog input front end signal conditioning +5 V, +10 V, ±5 V, ±10 V and 4 to 20 mA Isolation
Sensor signal conditioning Power supply monitoring Electrohydraulic control Motor control
GENERAL DESCRIPTION
The AD628 is a precision difference amplifier that combines excellent dc performance with high common-mode rejection over a wide range of frequencies. When used to scale high voltages, it allows simple conversion of standard control voltages or currents for use with single-supply ADCs. A wideband feedback loop minimizes distortion effects due to capacitor charging of ∑-∆ ADCs.
A reference pin (VREF) provides a dc offset for converting
bipolar to single-sided signals. The AD628 converts +5 V, +10 V, ±5 V, ±10 V, and 4 to 20 mA input signals to a single-ended output within the input range of single-supply ADCs. The AD628 has an input common-mode and differential mode operating range of ±120 V. The high common-mode input impedance makes the device well suited for high voltage measurements across a shunt resistor. The buffer amplifier’s inverting input is available for making a remote Kelvin connection.
Rev. C
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AD628FUNCTIONAL BLOCK DIAGRAM
REXT2REXT1+VSRG–IN100kΩ10kΩG = +0.1–IN–INA2OUTA110kΩ+IN+IN+IN100kΩ10kΩAD628–VSVREF1C0FILT0-C-29920
Figure 1.
130120110100VS =±15V)B90d( RR80MC70V60S =±2.5V5040302101001k10k100k00-C-29FREQUENCY (Hz)920
Figure 2. CMRR vs. Frequency of the AD628
A precision 10 kΩ resistor connected to an external pin is provided for either a low-pass filter or to attenuate large
differential input signals. A single capacitor implements a low-pass filter. The AD628 operates from single and dual supplies and is available in an 8-lead SOIC or MSOP package. It operates over the standard industrial temperature range of −40°C to +85°C.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703© 2004 Analog Devices, Inc. All rights reserved.
AD628
TABLE OF CONTENTS Specifications.....................................................................................3 Absolute Maximum Ratings............................................................7 ESD Caution..................................................................................7 Pin Configuration and Function Descriptions.............................8 Typical Performance Characteristics.............................................9 Test Circuits.....................................................................................13 Theory of Operation......................................................................14 Applications.....................................................................................15 Gain Adjustment.........................................................................15 Input Voltage Range...................................................................15 Voltage Level Conversion..........................................................16 Current Loop Receiver...............................................................17 Monitoring Battery Voltages.....................................................17 Filter Capacitor Values...............................................................18 Kelvin Connection.....................................................................18 Outline Dimensions.......................................................................19 Ordering Guide...........................................................................19
REVISION HISTORY
4/04—Data Sheet Changed from Rev. B to Rev. C
Updated Format.................................................................Universal Changes to Specifications...............................................................3 Changes to Absolute Maximum Ratings......................................7 Changes to Figure 3.........................................................................7 Changes to Figure 26.....................................................................13 Changes to Figure 27.....................................................................13 Changes to Theory of Operation................................................14 Changes to Figure 29.....................................................................14 Changes to Table 5.........................................................................15 Changes to Gain Adjustment Section.........................................15 Added the Input Voltage Range Section.....................................15 Added Figure 30............................................................................15 Added Figure 31............................................................................15 Changes to Voltage Level Conversion Section..........................16 Changes to Figure 32.....................................................................16 Changes to Table 6.........................................................................16 Changes to Figure 33 and Figure 34............................................17 Changes to Figure 35.....................................................................18 Changes to Kelvin Connection Section......................................18
6/03—Data Sheet Changed from Rev. A to Rev. B
Changes to General Description...................................................1 Changes to Specifications...............................................................2 Changes to Ordering Guide...........................................................4 Changes to TPCs 4, 5, and 6...........................................................5 Changes to TPC 9............................................................................6 Updated Outline Dimensions......................................................14 1/03—Data Sheet Changed from Rev. 0 to Rev. A
Change to Ordering Guide.............................................................4 11/02—Rev. 0: Initial Version
Rev. C | Page 2 of 20
AD628SPECIFICATIONS
TA = 25°C, VS = ±15 V, RL = 2 kΩ, REXT1 = 10 kΩ, REXT2 = ∞, VREF = 0 unless otherwise noted. Table 1.
AD628AR AD628ARM Parameter Conditions Min Typ Max Min Typ Max Unit DIFF AMP + OUTPUT AMP Gain Equation G = +0.1(1+ REXT1/REXT2). V/V Gain Range See Figure 29. 0.11 100 0.11 100 V/V
2
Offset Voltage −1.5 +1.5 −1.5 +1.5 mV VOCM = 0 V. RTI of input pins.
Output amp G = +1.
vs. Temperature 4 8 4 8 µV/°C CMRR 75 75 dB RTI of input pins.
G = +0.1 to +100.
500 Hz. 75 75 dB
Minimum CMRR Over Temperature −40°C to +85°C. 70 70 dB vs. Temperature 1 4 1 4 (µV/V)/°C PSRR (RTI) VS = ±10 V to ±18 V. 77 94 77 94 dB Input Voltage Range Common Mode −120 +120 −120 +120 V Differential −120 +120 −120 +120 V Dynamic Response Small Signal BW –3 dB G = +0.1. 600 600 kHz Full Power Bandwidth 5 5 kHz Settling Time G = +0.1, to 0.01%, 100 V step. 40 40 µs Slew Rate 0.3 0.3 V/µs Noise (RTI) Spectral Density 1 kHz. 300 300 nV/√Hz 0.1 Hz to 10 Hz. 15 15 µV p-p DIFF-AMP Gain 0.1 0.1 V/V Error −0.1 +0.01 +0.1 −0.1 +0.01 +0.1 % vs. Temperature 5 5 ppm/°C Nonlinearity 5 5 ppm vs. Temperature 3 10 3 10 ppm Offset Voltage RTI of input pins. −1.5 +1.5 −1.5 +1.5 mV vs. Temperature 8 8 µV/°C Input Impedance Differential 220 220 kΩ Common Mode 55 55 kΩ CMRR 75 75 dB RTI of input pins.
G = +0.1 to +100.
500 Hz. 75 75 dB
Minimum CMRR Over Temperature −40°C to +85°C. 70 70 dB vs. Temperature 1 4 1 4 (µV/V)/°C Output Resistance 10 10 kΩ Error −0.1 +0.1 −0.1 +0.1 %
Rev. C | Page 3 of 20
AD628
AD628AR AD628ARM Parameter Conditions Min Typ Max Min Typ Max Unit OUTPUT AMPLIFIER Gain Equation G = (1 + REXT1/REXT2). V/V Nonlinearity G = +1, VOUT = ±10 V. 0.5 0.5 ppm Offset Voltage RTI of output amp. −0.15 +0.15 −0.15 +0.15 mV vs. Temperature 0.6 0.6 µV/°C Output Voltage Swing RL = 10 kΩ. −14.2 +14.1 −14.2 +14.1 V RL = 2 kΩ. −13.8 +13.6 −13.8 +13.6 V Bias Current 1.5 3 1.5 3 nA Offset Current 0.2 0.5 0.2 0.5 nA CMRR VCM = ±13 V. 130 130 dB Open-Loop Gain VOUT = ±13 V. 130 130 dB POWER SUPPLY Operating Range ±2.25 ±18 ±2.25 ±18 V Quiescent Current 1.6 1.6 mA TEMPERATURE RANGE –40 +85 –40 +85 °C
12
To use a lower gain, see the Gain Adjustment section.
The addition of the difference amp’s and output amp’s offset voltage does not exceed this specification.
Rev. C | Page 4 of 20
AD628TA = 25°C, VS = +5 V, RL = 2 kΩ, REXT1 = 10 kΩ, REXT2 = ∞, VREF = +2.5 unless otherwise noted. Table 2.
AD628AR AD628ARM Parameter Conditions Min Typ Max Min Typ Max Unit DIFF AMP + OUTPUT AMP Gain Equation G = +0.1(1+ REXT1/REXT2). V/V Gain Range See Figure 29. 0.11 100 0.11 100 V/V
2
−3.0 +3.0 −3.0 +3.0 mV Offset Voltage VOCM = 2.25 V. RTI of input pins.
Output Amp G = +1.
vs. Temperature 6 15 6 15 µV/°C CMRR RTI of input pins. G = 0.1 to 100. 75 75 dB 500 Hz. 75 75 dB
Minimum CMRR Over Temperature −40°C to +85°C. 70 70 dB vs. Temperature 1 4 1 4 (µV/V)/°C PSRR (RTI) VS = 4.5 V to 10 V. 77 94 77 94 dB Input Voltage Range Common Mode3 −12 +17 −12 +17 V Differential −15 +15 −15 +15 V Dynamic Response Small Signal BW –3 dB G = +0.1. 440 440 kHz Full Power Bandwidth 30 30 kHz Settling Time G = +0.1, to 0.01%, 30 V step. 15 15 µs Slew Rate 0.3 0.3 V/µs Noise (RTI) Spectral Density 1 kHz. 350 350 nV/√Hz 0.1 Hz to 10 Hz. 15 15 µV p-p DIFF-AMP Gain 0.1 0.1 V/V Error –0.1 +0.01 +0.1 –0.1 +0.01 +0.1 % Nonlinearity 3 3 ppm vs. Temperature 3 10 3 10 ppm Offset Voltage RTI of input pins. −2.5 +2.5 −2.5 +2.5 mV vs. Temperature 10 10 µV/°C Input Impedance Differential 220 220 kΩ Common Mode 55 55 kΩ CMRR RTI of input pins. G = +0.1 to +100. 75 75 dB 500 Hz. 75 75 dB
Minimum CMRR Over Temperature −40°C to +85°C. 70 70 dB vs. Temperature 1 4 1 4 (µV/V)/°C Output Resistance 10 10 kΩ Error −0.1 +0.1 −0.1 +0.1 % OUTPUT AMPLIFIER Gain Equation G = (1 + REXT1/REXT2). V/V Nonlinearity G = +1, VOUT = 1 V to 4 V. 0.5 0.5 ppm Output Offset Voltage RTI of output amp. −0.15 0.15 −0.15 0.15 mV vs. Temperature 0.6 0.6 µV/°C Output Voltage Swing RL = 10 kΩ. 0.9 4.1 0.9 4.1 V RL = 2 kΩ. 1 4 1 4 V Bias Current 1.5 3 1.5 3 nA Offset Current 0.2 0.5 0.2 0.5 nA CMRR VCM = 1 V to 4 V. 130 130 dB Open-Loop Gain VOUT = 1 V to 4 V. 130 130 dB
Rev. C | Page 5 of 20
AD628
AD628AR AD628ARM Parameter Conditions Min Typ Max Min Typ Max Unit POWER SUPPLY Operating Range ±2.25 +36 ±2.25 +36 V Quiescent Current 1.6 1.6 mA TEMPERATURE RANGE −40 +85 −40 +85 °C
To use a lower gain, see the Gain Adjustment section.
The addition of the difference amp’s and output amp’s offset voltage does not exceed this specification. 3
Greater values of voltage are possible with greater or lesser values of VREF.
12
Rev. C | Page 6 of 20
AD628ABSOLUTE MAXIMUM RATINGS
Table 3.
1.6Parameter Rating TJ = 150°CSupply Voltage ±18 V
1.4Internal Power Dissipation See Figure 3
1.2Input Voltage (Common Mode) ±120 V1
8-LEAD MSOP PACKAGEDifferential Input Voltage ±120 V1
1.0Output Short-Circuit Duration Indefinite
8-LEAD SOIC PACKAGE0.8Storage Temperature –65°C to +125°C
Operating Temperature Range –40°C to +85°C 0.6Lead Temperature Range (10 sec Soldering) 300°C
POWER DISSIPATION (W)Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
1
0.40.20–60MSOPθJ (JEDEC; 4-LAYER BOARD) = 132.54°C/WSOICθJ (JEDEC; 4-LAYER BOARD) = 154°C/W–40–2002040608010002992-C-003AMBIENT TEMPERATURE (°C)
Figure 3. Maximum Power Dissipation vs. Temperature
When using ±12 V supplies or higher (see the Input Voltage Range section).
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. C | Page 7 of 20
AD628
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
+IN18–IN–VS2AD6287+VSV3TOP VIEWREF(Not to Scale)6RG400-CCFILT45OUT-29920
Figure 4. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Function
1 +IN Noninverting Input
2 −VS Negative Supply Voltage 3 VREF Reference Voltage Input 4 CFILT Filter Capacitor Connection 5 OUT Amplifier Output
6 RG Output Amplifier Inverting Input 7 +VS Positive Supply Voltage 8 −IN Inverting Input
Rev. C | Page 8 of 20
AD628
TYPICAL PERFORMANCE CHARACTERISTICS
401408440 UNITSG = +0.13512030100S25)TBId80N(U 20 R–15V+15VFROS 60%15P+2.5V104052005–1.600–1.2–0.8–0.400.40.81.21.62.00-C0.11101001k10k100k1M-2INPUT OFFSET VOLTAGE (mV)9920
FREQUENCY (Hz)Figure 5. Typical Distribution of Input Offset Voltage,
Figure 8. PSRR vs. Frequency, Single and Dual Supplies
VS = ±15 V, SOIC Package
2510008440 UNITS)20zH /nV( YSTIT15INNSU DEF OE S%10INO EAG5TLOV06–74–78–82–86–90–94–98–102–106–11000100-C-1101001k10k100k2CMRR (dB)9920
FREQUENCY (Hz)Figure 6. Typical Distribution of Common-Mode Rejection, SOIC Package
Figure 9. Voltage Noise Spectral Density, RTI, VS = ±15 V
1301000120)110zH /100nV( Y)B90VS =±15VTISdN( R80DER MESC70IV =±2.5VNO 60SEAGT50LOV40307101001k10k100k00100-C-1101001k10k100k29FREQUENCY (Hz)920
FREQUENCY (Hz)Figure 7. CMRR vs. Frequency
Figure 10. Voltage Noise Spectral Density, RTI, VS = ±2.5 V
Rev. C | Page 9 of 20
800-C-29920
900-C-29920
010-C-29920
AD628
1s10090)VID/Vµ(5 ESINO1000510TIME (Sec)Figure 11. 0.1 Hz to 10 Hz Voltage Noise, RTI
605040G = +10030G = +10)B20d( N10IAG0G = +1–10–20G = +0.1–30–401001k10k100k1M10MFREQUENCY (Hz)Figure 12. Small Signal Frequency Response, VOUT = 200 mV p-p, G = +0.1, +1, +10, and +100
605040G = +10030G = +10)B20d( N10IAG0G = +1–10–20G = +0.1–30–40101001k10k100k1MFREQUENCY (Hz)Figure 13. Large Signal Frequency Response, VOUT = 20 V p-p, G = +0.1, +1, +10, and +100
409638 UNITS3530S25CEIVDE20 FO %151051100-C-20123456789109920
GAIN ERROR (ppm)Figure 14. Typical Distribution of +1 Gain Error
150UPPER CMV LIMIT100)(V –40°CEGAT50LOV+85°C ED0+25°CVREF = 0VOM-NOM–50–40°CMOC–100+85°CLOWER CMV LIMIT21–1500-C05101520-29920
VS (±V)Figure 15. Common-Mode Operating Range vs. Power Supply Voltage for Three Temperatures
500µVVS=±15V100RL = 1kΩ90)µV( RORRRL = 2kΩ ETUTPUORL = 10kΩ1004.0V310-C-29920
OUTPUT VOLTAGE (V)Figure 16. Normalized Gain Error vs. VOUT, VS = ±15 V
Rev. C | Page 10 of 20
410-C-29920510-C-29920610-C-29920
AD628
100µVVS=±2.5VR100L = 1kΩ90)Vµ( RORRL = 2kΩR ETUTPUORL = 10kΩ100500mV710-C-2OUTPUT VOLTAGE (V)9920
Figure 17. Normalized Gain Error vs. VOUT, VS = ±2.5 V
43)An( TNRER2UC ASIB108–40–2002040608010010-C-29TEMPERATURE (°C)920
Figure 18. Bias Current vs. Temperature Buffer
15–40°C10–25°C)(V+85°C GNIW5+25°CS EGAT0LOV–40°C TU–5P–25°CTUO+85°C+25°C–10–159051015202510-C-2OUTPUT CURRENT (mA)9920
Figure 19. Output Voltage Operating Range vs. Output Current
Rev. C | Page 11 of 20
500mV1009010050mV4µsFigure 20. Small Signal Pulse Response, RL = 2 kΩ, CL = 0 pF, Top: Input, Bottom: Output
500mV1009010050mV4µsFigure 21. Small Signal Pulse Response,
RL = 2 kΩ, CL = 1000 pF, Top: Input, Bottom: Output
1009010.0 V10.0 V10040µsFigure 22. Large Signal Pulse Response,
RL = 2 kΩ, CL = 1000 pF, Top: Input, Bottom: Output
020-C-29920
120-C-29920
220-C-29920
AD628
100905V10mV100100µsFigure 23. Settling Time to 0.01%, 0 V to 10 V Step
320-C-29920
Rev. C | Page 12 of 20
100905V10mV100100µsFigure 24. Settling Time to 0.01% 0 V to −10 V Step
420-C-29920
AD628TEST CIRCUITS
HP3589ASPECTRUM ANALYZERHP3561ASPECTRUM ANALYZER+VS7+VSCFILT4–IN100kΩ10kΩ10kΩ+IN–OUTAD829+G = +100+IN100kΩ–ING = +0.1+IN–INFETPROBE–IN8100kΩ10kΩ10kΩ+IN5OUT10kΩVREFCFILTRGAD628+IN1100kΩ–ING = +0.1+IN10kΩ–INAD6286–VSVREF32RG–VS–10kΩ02992-C-02710kΩ02992-C-025AD707+
Figure 27. Noise Tests
Figure 25. CMRR vs. Frequency
SCOPE
+VS1 VAC+15V–IN100kΩ–ING = +0.1+IN10kΩ10kΩG = +100+IN–INOUT20Ω+G = +100
AD829–+IN100kΩ10kΩAD628VREF–VSCFILTRG02992-C-026 Figure 26. PSRR vs. Frequency
Rev. C | Page 13 of 20
AD628
THEORY OF OPERATION
The AD628 is a high common-mode voltage difference
amplifier, combined with a user configurable output amplifier (see Figure 28 and Figure 29). Differential mode voltages in excess of 120 V are accurately scaled by a precision 11:1 voltage divider at the input. A reference voltage input is available to the user at Pin 3 (VREF). The output common-mode voltage of the difference amplifier is the same as the voltage applied to the reference pin. If the uncommitted amplifier is configured for gain, connecting Pin 3 to one end of the external gain resistor establishes the output common-mode voltage at Pin 5 (OUT). The output of the difference amplifier is internally connected to a 10 kΩ resistor trimmed to better than ±0.1% absolute
accuracy. The resistor is connected to the noninverting input of the output amplifier and is accessible to the user at Pin 4 (CFILT). A capacitor may be connected to implement a low-pass filter, a resistor may be connected to further reduce the output voltage, or a clamp circuit may be connected to limit the output swing. The uncommitted amplifier is a high open-loop gain, low offset, low drift op amp, with its noninverting input connected to the internal 10 kΩ resistor. Both inputs are accessible to the user. Careful layout design has resulted in exceptional common-mode rejection at higher frequencies. The inputs are connected to Pin 1 (+IN) and Pin 8 (−IN), which are adjacent to the power Pin 2 (−VS) and Pin 7 (+VS). Because the power pins are at ac ground, input impedance balance and, therefore, common-mode rejection, are preserved at higher frequencies.
RG100kΩ10kΩG = +0.1–INA1+IN+IN100kΩ10kΩ02992-C-028–IN–IN10kΩA2+INOUTVREFCFILT
Figure 28. Simplified Schematic
CFILT+VSAD628–IN100kΩ10kΩG = +0.1–INA1+IN+IN100kΩ10kΩ–IN10kΩ+INA2OUT–VSVREFRGREXT3REFERENCEVOLTAGE02992-C-029REXT2REXT1 Figure 29. Circuit Connections
Rev. C | Page 14 of 20
AD628INPUT VOLTAGE RANGE
The common-mode input voltage range is determined by VREF and the supply voltage. The relation is expressed by
VCMUPPER≤11(VS+–1.2V)−10VREFVCMLOWER≥11(VS−+1.2V)−10VREF
APPLICATIONS
GAIN ADJUSTMENT
The AD628 system gain is provided by an architecture consisting of two amplifiers. The gain of the input stage is fixed at 0.1; the output buffer is user adjustable as GA2 = 1 + REXT1/REXT2. The system gain is then
(2)
⎛REXT1⎞ (1)
⎟GTOTAL=0.1×⎜⎟⎜1+Rwhere VS+ is the positive supply, VS− is the negative supply EXT2⎠⎝
and 1.2 V is the headroom needed for suitable performance.
At a 2 nA maximum, the input bias current of the buffer amplifier Equation 2 provides a general formula for calculating the is very low and any offset voltage induced at the buffer amplifier by common-mode input voltage range. However, the AD628 its bias current may be neglected (2 nA × 10 kΩ = 20 µV). However, should be kept within the maximum limits listed in the to absolutely minimize bias current effects, REXT1 and REXT2 may be Specifications table (Table 1) to maintain optimal performance. selected so that their parallel combination is 10 kΩ. If practical This is illustrated in Figure 30 where the maximum common-resistor values force the parallel combination of REXT1 and REXT2 mode input voltage is limited to ±120 V. Figure 31 shows the below 10 kΩ, a series resistor (REXT3) may be added to make up for common-mode input voltage bounds for single-supply voltages. the difference. Table 5 lists several values of gain and corresponding
200resistor values.
INPUT COMMON-MODE VOLTAGE (V)Table 5. Nearest Standard 1% Resistor Values for Various Gains (See Figure 29)
Total Gain A2 Gain REXT1 (Ω) REXT2 (Ω) REXT3 (Ω) (V/V) (V/V)
0.1 1 10 k ∞ 0 0.2 2 20 k 20 k 0 0.25 2.5 25.9 k 18.7 k 0 0.5 5 49.9 k 12.4 k 0 1 10 100 k 11 k 0 2 20 200 k 10.5 k 0 5 50 499 k 10.2 k 0 10 100 1 M 10.2 k 0
150100500–50–100–15002992-C-03502992-C-034MAXIMUM INPUT COMMON-MODEVOLTAGE WHEN VREF = GND–2000246810121416SUPPLY VOLTAGE (±V)To set the system gain to less than 0.1, an attenuator may be created by placing a resistor, REXT4, from Pin 4 (CFILT) to the reference voltage. A divider would be formed by the 10 kΩ resistor which is in series with the positive input of A2 and REXT4. A2 would be configured for unity gain. Using a divider and setting A2 to unity gain yields
Figure 30. Input Common-Mode Voltage vs. Supply Voltage for Dual Supplies
100INPUT COMMON-MODE VOLTAGE (V)806040200–20–40–60–80MAXIMUM INPUT COMMON-MODEVOLTAGE WHEN VREF = MIDSUPPLY⎛REXT4
GW/DIVIDER=0.1×⎜⎜10kΩ+REXT4
⎝
⎞⎟×1 ⎟⎠
0246810121416SINGLE-SUPPLY VOLTAGE (V)
Figure 31. Input Common-Mode Voltage vs.
Supply Voltage for Single Supplies
Rev. C | Page 15 of 20
AD628
The differential input voltage range is constrained to the linear operation of the internal amplifiers A1 and A2. The voltage applied to the inputs of A1 and A2 should be between VS− + 1.2 V and VS+ − 1.2 V. Similarly, the outputs of A1 and A2 should be kept between VS− + 0.9 V and VS+ − 0.9 V.
The design of such an application may be done in a few simple steps, which include the following:
• Determine the required gain. For example, if the input voltage must be transformed from ±10 V to 0 V to +5 V, the gain is +5/+20 or +0.25.
• Determine if the circuit common-mode voltage must be changed. An AD7715-5 ADC is illustrated for this example. When operating from a 5 V supply, the common-mode voltage of the AD7715 is half the supply or 2.5 V. If the AD628 reference pin and the lower terminal of the 10 kΩ resistor are connected to a 2.5 V voltage source, the output common-mode voltage will be 2.5 V.
VOLTAGE LEVEL CONVERSION
Industrial signal conditioning and control applications typically require connections between remote sensors or amplifiers and centrally located control modules. Signal conditioners provide output voltages up to ±10 V full scale; however, ADCs or
microprocessors operating on single 3.3 V to 5 V logic supplies are becoming the norm. Thus, the controller voltages require further reduction in amplitude and reference.
Furthermore, voltage potentials between locations are seldom compatible, and power line peaks and surges can generate
destructive energy between utility grids. The AD628 is an ideal solution to both problems. It attenuates otherwise destructive signal voltage peaks and surges by a factor of 10 and shifts the differential input signal to the desired output voltage. Conversion from voltage-driven or current-loop systems is easily accommodated using the circuit in Figure 32. This shows a circuit for converting inputs of various polarities and amplitudes to the input of a single-supply ADC.
Note that the common-mode output voltage can be adjusted by connecting Pin 3 (VREF) and the lower end of the 10 kΩ resistor to the desired voltage. The output common-mode voltage will be the same as the reference voltage.
Table 6 shows resistor and reference values for commonly used single-supply converter voltages. REXT3 is included as an option. It is used to balance the source impedance into A2, which is described in more detail in the Gain Adjustment section. Table 6. Nearest 1% Resistor Values for Voltages Level Conversion Applications
ADC
Input Supply Voltage Voltage (V) (V)
±10 5 ±5 5 +10 5 +5 5 ±10 3 ±5 3 +10 3 +5 3 Desired Output Voltage (V) 2.5 2.5 2.5 2.5 1.25 1.25 1.25 1.25
AD7715-5SERIAL CLOCKCLOCKNCSCLKMCLK INMCLK OUTCS+5VRESETAVDD+INOUTA2–INAIN(–)REF IN(+)REXT1(SEETABLE 5)AIN(+)REF IN(–)DGNDDVDDDINDOUTDRDYAGND+5VVREF REXT1 REXT3
(kΩ) (V) (kΩ)
2.5 15.0 4.02 2.5 39.7 2.00 2.5 39.7 2.00 2.5 89.8 1.00 1.25 2.49 7.96 1.25 15.0 4.02 1.25 15.0 4.02 1.25 39.7 2.00
+VS–IN(SEETABLE 5)100kΩ10kΩG = +0.1–IN10kΩVIN+IN+IN100kΩ10kΩVREFA1AD628+2.5V–VSRGCFILTREXT310kΩAD680+5V02992-C-030(SEETABLE 5)
Figure 32. Level Shifter
Rev. C | Page 16 of 20
AD628MONITORING BATTERY VOLTAGES
Figure 34 illustrates how the AD628 may be used to monitor a battery charger. Voltages approximately eight times the power supply voltage may be applied to the input with no damage. The resistor divider action is well suited for the measurement of many power supply applications, such as those found in battery chargers or similar equipment.
CURRENT LOOP RECEIVER
Analog data transmitted on a 4 to 20 mA current loop may be detected with the receiver shown in Figure 33. The AD628 is an ideal choice for such a function, because the current loop must be driven with a compliance voltage sufficient to stabilize the loop, and the resultant common-mode voltage often exceeds commonly used supply voltages. Note that with large shunt values a resistance of equal value must be inserted in series with the inverting input to compensate for an error at the noninverting input.
+15V+VS250Ω–IN100kΩ10kΩ10kΩ+INA2–INOUT0V TO 5VTO ADC–IN250Ω100kΩ+IN10kΩ4–20mASOURCEVREF+ING = +0.1A1AD628RG–VS–15VCFILTREXT1100kΩ2.5VREF02992-C-031REXT211kΩ
Figure 33. Level Shifter for 4 to 20 mA Current Loop
5V+VSnVBAT(V)–IN100kΩ10kΩ10kΩ+INA2CHARGINGCIRCUIT–IN+1.5VBATTERY+IN10kΩ+IN100kΩRGG = +0.1A1–INOUTREXT110kΩ0V TO 5VTO ADC–VSVREFCFILT02992-C-032OTHERBATTERIES INCHARGINGCIRCUITAD628
Figure 34. Battery Voltage Monitor
Rev. C | Page 17 of 20
AD628
FILTER CAPACITOR VALUES
A capacitor may be connected to Pin 4 (CFILT) to implement a low-pass filter. The capacitor value is
C=15.9/ft(μF)
KELVIN CONNECTION
In certain applications, it may be desirable to connect the
inverting input of an amplifier to a remote reference point. This eliminates errors resulting in circuit losses in interconnecting wiring. The AD628 is particularly suited for this type of connection. In Figure 35, a 10 kΩ resistor is added in the feedback to match the source impedance of A2, which is described in more detail in the Gain Adjustment section.
5V+VS–IN100kΩ10kΩ10kΩ+INA2–INOUTCIRCUITLOSSwhere ft is the desired 3 dB filter frequency.
Table 7 shows several frequencies and their closest standard capacitor values.
Table 7. Capacitor Values for Various Filter Frequencies
Frequency (Hz) 10 50 60 100 400 1 k 5 k 10 k
Capacitor Value (µF) 1.5 0.33 0.27 0.15 0.039 0.015 0.0033 0.0015
–IN+IN100kΩ+IN10kΩG = +0.1A1RG10kΩLOADAD628–VSVREFVS/2CFILT
02992-C-033
Figure 35. Kelvin Connection
Rev. C | Page 18 of 20
AD628OUTLINE DIMENSIONS
3.00BSC5.00(0.1968)4.80(0.1890)583.00BSC44.90BSC4.00 (0.1574)3.80 (0.1497)18546.20 (0.2440)5.80 (0.2284)PIN 10.65 BSC0.150.000.380.22COPLANARITY0.101.10 MAX8°0°0.800.600.401.27 (0.0500)BSC0.25 (0.0098)0.10 (0.0040)1.75 (0.0688)1.35 (0.0532)0.50 (0.0196)× 45°0.25 (0.0099)0.230.08SEATINGPLANE0.51 (0.0201)COPLANARITYSEATING0.31 (0.0122)0.10PLANE8°0.25 (0.0098)0°1.27 (0.0500)0.40 (0.0157)0.17 (0.0067)COMPLIANT TO JEDEC STANDARDS MO-187AA
COMPLIANT TO JEDEC STANDARDS MS-012AACONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FORREFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 36. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters Figure 37. 8-Lead Standard Small Outline Package [SOIC] Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model Temperature Range AD628AR −40°C to +85°C AD628AR-REEL −40°C to +85°C AD628AR-REEL7 −40°C to +85°C AD628ARM −40°C to +85°C AD628ARM-REEL −40°C to +85°C AD628ARM-REEL7 −40°C to +85°C AD628-EVAL Description Package Option 8-Lead SOIC R-8 8-Lead SOIC 13\" Reel R-8 8-Lead SOIC 7\" Reel R-8 8-Lead MSOP RM-8 8-Lead MSOP 13\" Reel RM-8 8-Lead MSOP 7\" Reel RM-8 Evaluation Board
Branding
JGA JGA JGA
Rev. C | Page 19 of 20
AD628
NOTES
© 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C02992–0–4/04(C)
Rev. C | Page 20 of 20
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