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4选1多路选择器源码

来源:个人技术集锦
----4选1多路选择器源码 entity mux is port(

a, b, c, d: in std_logic_vector(3 downto 0); s: in std_logic_vector(1 downto 0); x: out std_logic_vector(3 downto 0)); end mux;

architecture archmux of mux is begin

x(3) <= or or or

x(2) <= or or or

x(1) <= or or or

x(0) <= or or or

end archmux;

(a(3) and not(s(1)) and not(s(0))) (b(3) and not(s(1)) and (s(0)) (c(3) and (s(1)) and not (s(0))) (d(3) and (s(1)) and (s(0)); (a(2) and not(s(1)) and not(s(0))) (b(2) and not(s(1)) and (s(0)) (c(2) and (s(1)) and not (s(0))) (d(2) and (s(1)) and (s(0)); (a(1) and not(s(1)) and not(s(0))) (b(1) and not(s(1)) and (s(0)) (c(1) and (s(1)) and not (s(0))) (d(1) and (s(1)) and (s(0)); (a(0) and not(s(1)) and not(s(0))) (b(0) and not(s(1)) and (s(0)) (c(0) and (s(1)) and not (s(0))) (d(0) and (s(1)) and (s(0));

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