Quad 2-Channel Multiplexer
The MC74VHCT157A is an advanced high speed CMOS quad2−channel multiplexer fabricated with silicon gate CMOS technology.It achieves high speed operation similar to equivalent BipolarSchottky TTL while maintaining CMOS low power dissipation.
It consists of four 2−input digital multiplexers with common select(S) and enable (E) inputs. When E is held High, selection of data isinhibited and all the outputs go Low.
The select decoding determines whether the A or B inputs get routedto the corresponding Y outputs.
The VHCT inputs are compatible with TTL levels. This device canbe used as a level converter for interfacing 3.3 V to 5.0 V because ithas full 5.0 V CMOS level output swings.
The VHCT157A input structures provide protection when voltagesbetween 0 V and 5.5 V are applied, regardless of the supply voltage.The output structures also provide protection when VCC = 0 V. Theseinput and output structures help prevent device destruction caused bysupply voltage−input/output voltage mismatch, battery backup, hotinsertion, etc.
The inputs tolerate voltages up to 7.0 V, allowing the interface of5.0 V systems to 3.0 V systems.
Features
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MARKINGDIAGRAMS
16
SOIC−16D SUFFIXCASE 751B
11
VHCT157AGAWLYWW
16
TSSOP−16DT SUFFIXCASE 948F
1116
SOEIAJ−16M SUFFIXCASE 966
11
74VHCT157ALYWGVHCT157AALYWGG••••••••••••
High Speed: tPD = 4.1 ns (Typ) at VCC = 5.0 V
Low Power Dissipation: ICC = 4 mA (Max) at TA = 25°CTTL−Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V
Power Down Protection Provided on Inputs and OutputsBalanced Propagation Delays
Designed for 2.0 V to 5.5 V Operating RangeLow Noise: VOLP = 0.8 V (Max)
Pin and Function Compatible with Other Standard Logic FamiliesLatchup Performance Exceeds 300 mAESD Performance:
Human Body Model > 2000 V;Machine Model > 200 V
Chip Complexity: 82 FETs or 20 Equivalent GatesThese Devices are Pb−Free and are RoHS Compliant
A=Assembly LocationWL, L=Wafer LotY=Year
WW, W=Work WeekG or G= Pb−Free Package
(Note: Microdot may be in either location)
FUNCTION TABLE
InputsE HLLSOutputs Y0 − Y3XLLA0−A3HB0−B3A0 − A3, B0 − B3 = the levels of
the respective Data−Word Inputs.
ORDERING INFORMATION
See detailed ordering and shipping information in the packagedimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
May, 2011 − Rev. 3
1
Publication Order Number:
MC74VHCT157A/D
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MC74VHCT157A
SA0B0Y0A1B1Y1GND
12345678161514131211109VCCEA3B3Y3A2B2Y2
Figure 1. Pin Assignment
A0B0A1B1NIBBLEINPUTS
A2B2A3B3ES
23561110141315112Y39Y27Y1DATAOUTPUTS
4Y0Figure 2. Expanded Logic Diagram
ESA0B0A1B1A2B2A3B3
151235611101413ENG111MUX47912Y0Y1Y2Y3
This device contains protection circuitry toguard against damage due to high staticvoltages or electric fields. However, pre-cautions must be taken to avoid applicationsof any voltage higher than maximum ratedvoltages to this high−impedance circuit. Forproper operation, Vin and Vout should beconstrained to the range GND v (Vin or Vout)v VCC.
Unused inputs must always be tied to anappropriate logic voltage level (e.g., eitherGND or VCC). Unused outputs must be leftopen.
Figure 3. IEC Logic Symbol
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MC74VHCT157A
MAXIMUM RATINGS (Note 1)
SymbolVCCVINVOUTIIKIOKIOUTICCPDTSTGVESD
Positive DC Supply VoltageDigital Input VoltageDC Output VoltageInput Diode CurrentOutput Diode CurrentDC Output Current, per Pin
DC Supply Current, VCC and GND PinsPower Dissipation in Still AirStorage Temperature RangeESD Withstand Voltage
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
Above VCC and Below GND at 125°C (Note 5)
SOIC Package
TSSOPSOIC Package
TSSOPOutput in 3−StateHigh or Low State
Parameter
Value−0.5 to +7.0−0.5 to +7.0−0.5 to +7.0−0.5 to VCC +0.5
−20$20$25$75200180−65 to +150>2000>200>2000$300143164
UnitVVVmAmAmAmAmW°CV
ILATCHUPqJA
Latchup PerformancemA°C/W
Thermal Resistance, Junction−to−Ambient
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limitvalues (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,damage may occur and reliability may be affected.
1.Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to theRecommended Operating Conditions.2.Tested to EIA/JESD22−A114−A3.Tested to EIA/JESD22−A115−A4.Tested to JESD22−C101−A5.Tested to EIA/JESD78
RECOMMENDED OPERATING CONDITIONS
SymbolVCCVINVOUTTAtr, tf
DC Supply VoltageDC Input VoltageDC Output Voltage
Operating Temperature Range, all Package TypesInput Rise or Fall Time
VCC = 5.0 V + 0.5 VOutput in 3−StateHigh or Low State
Characteristics
Min4.500−550
Max5.55.5VCC12520
UnitVVV°Cns/V
DEVICE JUNCTION TEMPERATURE VERSUS TIME TO0.1% BOND FAILURES
Time, Hours1,032,200419,300178,70079,60037,00017,8008,900
Time, Years
117.847.920.49.44.22.01.0
NORMALIZED FAILURE RATEJunctionTemperature °C
8090100110120130140
FAILURE RATE OF PLASTIC = CERAMICUNTIL INTERMETALLICS OCCURTJ= 130°CTJ= 120°CTJ= 100°CTJ= 110°CTJ= 80°C100
TIME, YEARS
TJ= 90°C11
10
1000
Figure 4. Failure Rate vs. Time Junction Temperature
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MC74VHCT157A
DC CHARACTERISTICS (Voltages Referenced to GND)
VCC
SymbolVIHVILVOH
Parameter
Minimum High−Level InputVoltage
Maximum Low−Level InputVoltage
Maximum High−Level OutputVoltage
VIN = VIH or VILIOH = −50 mAVIN = VIH or VILIOH = −8 mA
VOL
Maximum Low−Level OutputVoltage
VIN = VIH or VILIOL = 50 mAVIN = VIH or VILIOH = 8 mA
IINICCICCT
Input Leakage CurrentMaximum Quiescent SupplyCurrent
Additional Quiescent SupplyCurrent (per Pin)
VIN = 5.5 V or GNDVIN = VCC or GNDAny one input:
VIN = 3.4 V
All other inputs:
VIN = VCC or GNDVOUT = 5.5 V
Condition
(V)4.5 to5.54.5 to5.54.54.54.54.50 to 5.55.55.5
4.43.94
0.0
0.10.36±0.14.01.35
4.5
Min2
0.8
TA = 25°CTyp
Max
TA ≤ 85°CMin2
Max0.80.8
−55°C ≤ TA ≤
125°CMin2
0.8Max
UnitVVV
4.43.8
0.10.44±1.040.01.5
4.43.66
0.10.52±1.040.01.5
V
mAmAmA
IOPD
Output Leakage Current00.555mA
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns)
TA = 25°CTyp5.6
8.04.15.66.18.55.36.86.18.55.67.14
TA = ≤ 85°CMin1.01.01.01.01.01.01.01.01.01.01.01.0
7.711.07.59.5
−55°C ≤ TA ≤
125°CMin1.01.01.01.01.01.01.01.01.01.01.01.0
Max7.711.07.59.5
SymboltPLH,
tPHL
ParameterTest ConditionsMinMax7.010.06.48.4
MaxUnitns
Maximum Propagation Delay;
A to B to Y
VCC = 3.3 ± 0.3 VVCC = 5.0 ± 0.5 VVCC = 3.3 ± 0.3 VVCC = 5.0 ± 0.5 VVCC = 3.3 ± 0.3 VVCC = 5.0 ± 0.5 V
CL = 15pFCL = 50pFCL = 15pFCL = 50pFCL = 15pFCL = 50pFCL = 15pFCL = 50pFCL = 15pFCL = 50pFCL = 15pFCL = 50pF
tPLH,
tPHL
Maximum Propagation Delay;S to Y7.510.58.110.17.510.58.610.610
8.211.59.511.58.211.5
8.211.59.511.58.211.5
ns
tPLH,
tPHL
Maximum Propagation Delay;E to Yns
10.0
12.010
10.012.010
CIN
Maximum Input CapacitancepF
Typical @ 25°C, VCC = 5.0 V
CPD
Power Dissipation Capacitance (Note 6)
20
pF
6.CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no−load dynamicpower consumption; PD = CPD VCC2 fin + ICC VCC.
NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50pF, VCC = 5.0 V)
TA = 25°C
SymbolVOLPVOLVVIHDVILD
Characteristic
Quiet Output Maximum Dynamic VOLQuiet Output Minimum Dynamic VOLMinimum High Level Dynamic Input VoltageMaximum Low Level Dynamic Input Voltage
Typ0.3− 0.3
Max0.8− 0.82.00.8
UnitVVVV
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MC74VHCT157A
VCC
A, B or S50%tPLHY
50% VCCtPHLY
GND
A, B or S50%tPLH50% VCCtPHLVCCGND
Figure 5. Switching Waveform
Figure 6. Inverting Switching
TEST POINTOUTPUTDEVICEUNDERTESTCL*
INPUT
*Includes all probe and jig capacitance
Figure 7. Test CircuitFigure 8. Input Equivalent Circuit
ORDERING INFORMATION
Device
MC74VHCT157ADGMC74VHCT157ADR2GMC74VHCT157ADTGM74VHCT157ADTR2GMC74VHCT157AMGMC74VHCT157AMELG
PackageSOIC−16(Pb−Free)SOIC−16(Pb−Free)TSSOP−16*TSSOP−16*SOEIAJ−16(Pb−Free)SOEIAJ−16(Pb−Free)
Shipping†48 Units / Rail2500 Tape & Reel96 Units / Rail2500 Tape & Reel50 Units / Rail2000 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel PackagingSpecifications Brochure, BRD8011/D.*This package is inherently Pb−Free.
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MC74VHCT157A
PACKAGE DIMENSIONS
SOIC−16CASE 751B−05
ISSUE K
−A−169NOTES:
1.DIMENSIONING AND TOLERANCING PER ANSIY14.5M, 1982.
2.CONTROLLING DIMENSION: MILLIMETER.
3.DIMENSIONS A AND B DO NOT INCLUDE MOLDPROTRUSION.
4.MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.5.DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR PROTRUSIONSHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE DDIMENSION AT MAXIMUM MATERIAL CONDITION.
DIMABCDFGJKMPR
MILLIMETERSMINMAX9.8010.003.804.001.351.750.350.490.401.251.27 BSC0.190.250.100.250 7 __5.806.200.250.50
INCHES
MINMAX0.3860.3930.1500.1570.0540.0680.0140.0190.0160.0490.050 BSC0.0080.0090.0040.0090 7 __0.2290.2440.0100.019
−B−18P8 PL0.25 (0.010)MBSGFKC−T−SEATINGPLANERX 45_MD16 PLMJ0.25 (0.010)TB
SA
SSOLDERING FOOTPRINT
6.4016X8X1.1216116X
0.58
1.27PITCH89DIMENSIONS: MILLIMETERShttp://onsemi.com
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MC74VHCT157A
PACKAGE DIMENSIONS
TSSOP−16CASE 948F−01ISSUE B
16X REFKNOTES:
1.DIMENSIONING AND TOLERANCING PERANSI Y14.5M, 1982.
2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSION A DOES NOT INCLUDE MOLDFLASH. PROTRUSIONS OR GATE BURRS.MOLD FLASH OR GATE BURRS SHALL NOTEXCEED 0.15 (0.006) PER SIDE.
4.DIMENSION B DOES NOT INCLUDEINTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALLNOT EXCEED 0.25 (0.010) PER SIDE.5.DIMENSION K DOES NOT INCLUDEDAMBAR PROTRUSION. ALLOWABLEDAMBAR PROTRUSION SHALL BE 0.08(0.003) TOTAL IN EXCESS OF THE KDIMENSION AT MAXIMUM MATERIALCONDITION.
6.TERMINAL NUMBERS ARE SHOWN FORREFERENCE ONLY.
7.DIMENSION A AND B ARE TO BEDETERMINED AT DATUM PLANE −W−.
DIMABCDFGHJJ1KK1LMMILLIMETERSMINMAX4.905.104.304.50−−−1.200.050.150.500.750.65 BSC0.180.280.090.200.090.160.190.300.190.256.40 BSC0 8 __INCHESMINMAX0.1930.2000.1690.177−−−0.0470.0020.0060.0200.0300.026 BSC0.0070.0110.0040.0080.0040.0060.0070.0120.0070.0100.252 BSC0 8 __0.10 (0.004)0.15 (0.006)TUSMTUSVSKK12XL/2169J1B−U−LPIN 1IDENT.18SECTION N−NJN0.25 (0.010)M0.15 (0.006)TUSA−V−NFDETAIL EC0.10 (0.004)−T−SEATINGPLANE−W−DGHDETAIL ESOLDERING FOOTPRINT
7.0610.65PITCH
0.36
16X
16X1.26DIMENSIONS: MILLIMETERShttp://onsemi.com
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MC74VHCT157A
PACKAGE DIMENSIONS
SOEIAJ−16CASE 966−01ISSUE A
169LEQ1EHEM_LDETAIL P
18ZDAVIEW PcNOTES:
1.DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2.CONTROLLING DIMENSION: MILLIMETER. 3.DIMENSIONS D AND E DO NOT INCLUDE
MOLD FLASH OR PROTRUSIONS AND ARE
MEASURED AT THE PARTING LINE. MOLD FLASHOR PROTRUSIONS SHALL NOT EXCEED 0.15(0.006) PER SIDE.
4.TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5.THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLEDAMBAR PROTRUSION SHALL BE 0.08 (0.003)TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.DAMBAR CANNOT BE LOCATED ON THE LOWERRADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEADTO BE 0.46 ( 0.018).
DIMAA1bcDEeHELLEMQ1Z
MILLIMETERSMINMAX---2.050.050.200.350.500.100.209.9010.505.105.451.27 BSC7.408.200.500.851.101.500 _10 _0.700.90---0.78
INCHESMINMAX---0.0810.0020.0080.0140.0200.0070.0110.3900.4130.2010.2150.050 BSC0.2910.3230.0200.0330.0430.0590 _10 _0.0280.035---0.031
eb0.13 (0.005)MA10.10 (0.004)ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further noticeto any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liabilityarising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. Alloperating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rightsnor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applicationsintended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. ShouldBuyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or deathassociated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an EqualOpportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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